`timescale 1ns/100ps
// `include "timeTop.v"

module timeTop_tb;
reg          t_rstn    ;
reg          t_clk     ;
reg          t_setTime ;
reg          t_setHour ;
reg          t_setMin  ;
wire [7:0]   t_hour    ;
wire [7:0]   t_min     ;
wire [7:0]   t_sec     ;

integer m;
integer h;
initial begin
    t_rstn      <=  1'b0;
    t_clk       <=  1'b1;
    t_setTime   <=  1'b0;
    t_setHour   <=  1'b0;
    t_setMin    <=  1'b0;
    #2
    t_rstn      <=  1'b1;
    #30000
    t_setTime   <=  1'b1;
    #2
    for(m = 0; m < 120; m = m + 1) begin
        t_setMin    <=  ~t_setMin;
        #4;
    end
    for(h = 0; h < 48; h = h + 1) begin
        t_setHour   <=  ~t_setHour;
        #4;
    end
    #4
    t_setTime   <=  1'b0;
    #2000
    $finish;
end

always #2 t_clk <= ~t_clk;

// initial begin
//     $dumpfile("wave.vcd");
//     $dumpvars(0, timeTop_tb);
// end

timeTop timeTop_inst (
    .rstn       (       t_rstn          ),
    .clk        (       t_clk           ),

    .set_time   (       t_setTime       ),
    .set_hour   (       t_setHour       ),
    .set_min    (       t_setMin        ),

    .hour       (       t_hour          ),
    .min        (       t_min           ),
    .sec        (       t_sec           )
);

endmodule